Atikaa Hussain·Apr 11The Blue Screen of Death: Hardware Exception Handling and Micro-architectural Resilience in…The modern computing architectures are made on the foundation of stability but the underlying hardware architecture is a vast area of…
Dasun Pathirage·Aug 6, 2025Introduction to RISC-V Instruction SetRISC-V Instruction Set Background and Naming Scheme
Assembly Line·Jul 6, 2025Understanding “Bits” in CPUs: More Than Just a NumberWhat exactly determines a processor’s “bit-ness,” and what impact does it really have?
Ruban S·Jun 14, 2025Superscaling and Superpipelining: The Difference between a Processor and a Super Processor“The bigger the better”; something common for both food and CPU pipelines.
Ruban S·Apr 27, 2025Branch Prediction: The silent clairvoyant living inside the processorA short dive into the world of branch prediction, where they’re used, and why they matter.
Ruban S·Dec 15, 2024Control HazardsControl Hazards are another type of hazard that can have disastrous effects when not rectified. But to understand why so, we first need to…
Priyabrata Saha·Dec 6, 2024Using Angular with Micro-Frontend Architecture: A Guide to Scalable Web ApplicationsAs web applications grow in complexity, scalability and maintainability become critical. Enter Micro-Frontend Architecture — a…A response icon1A response icon1
Ruban S·Nov 30, 2024Mitigating Data Hazards in the PipelineResolving RAW dependencies in the pipeline
Ruban S·Oct 19, 2024Hazards in PipeliningExploring the side effects of pipelining and ways to mitigate them.
