Summary

v0.6.0 introduces GraphIR, a deterministic machine-readable hardware architecture graph generated directly from the same verification pipeline used by rv scan.

This release adds:

rv graph . --format json

GraphIR includes:

• components as graph nodes
• electrical connections as typed edges
• power rails
• protocol/interface groupings
• embedded verification findings
• finding-to-node/edge/interface indexes
• contract coverage metadata
• violation and warning rollups

Most importantly, graph output now reuses the same deterministic contract evaluation pipeline as rv scan, meaning custom system-level contract violations are reflected directly in graph topology output.

This release establishes a stable and deterministic graph representation for hardware architecture verification workflows.