rvda

package module
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Published: Jun 29, 2023 License: MIT Imports: 3 Imported by: 12

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rvda

RISC-V Disassembler

usage

code
isa, _ := rvda.New(32, rvda.RV32gc)
fmt.Printf("isa: %s\n", isa)

addr := uint(0xdeadbeef)
ins := uint(0x483f8297)
da := isa.Disassemble(addr, ins)

fmt.Printf("decode: %#v\n", da)
fmt.Printf("string: %s\n", da)
output
isa: RV32 ext "acdfim"
decode: &rvda.Disassembly{Addr:0xdeadbeef, AddrLength:0x20, Ins:0x483f8297, InsLength:0x4, Assembly:"auipc t0,0x483f8"}
string: deadbeef: 483f8297      auipc t0,0x483f8

Documentation

Index

Constants

View Source
const (
	ExtA = (1 << iota) // Atomic extension
	ExtB               // Tentatively reserved for Bit-Manipulation extension
	ExtC               // Compressed extension
	ExtD               // Double-precision floating-point extension
	ExtE               // RV32E base ISA
	ExtF               // Single-precision floating-point extension
	ExtG               // Additional standard extensions present
	ExtH               // Hypervisor extension
	ExtI               // RV32I/64I/128I base ISA
	ExtJ               // Tentatively reserved for Dynamically Translated Languages extension
	ExtK               // Reserved
	ExtL               // Tentatively reserved for Decimal Floating-Point extension
	ExtM               // Integer Multiply/Divide extension
	ExtN               // User-level interrupts supported
	ExtO               // Reserved
	ExtP               // Tentatively reserved for Packed-SIMD extension
	ExtQ               // Quad-precision floating-point extension
	ExtR               // Reserved
	ExtS               // Supervisor mode implemented
	ExtT               // Tentatively reserved for Transactional Memory extension
	ExtU               // User mode implemented
	ExtV               // Tentatively reserved for Vector extension
	ExtW               // Reserved
	ExtX               // Non-standard extensions present
	ExtY               // Reserved
	ExtZ               // Reserved
)

csr.MISA Extension Bitmap

Variables

View Source
var RV32g = uint(ExtI | ExtM | ExtA | ExtF | ExtD)

RV32g = RV32imafd

View Source
var RV32gc = RV32g | ExtC

RV32gc = RV32imafdc

View Source
var RV64g = uint(ExtI | ExtM | ExtA | ExtF | ExtD)

RV64g = RV64imafd

View Source
var RV64gc = RV64g | ExtC

RV64gc = RV64imafdc

Functions

This section is empty.

Types

type Disassembly

type Disassembly struct {
	Addr       uint // address
	AddrLength uint // address length in bits
	Ins        uint // instruction
	InsLength  uint // instruction length in bytes
	Assembly   string
}

Disassembly returns the result of the disassembler call.

func (*Disassembly) String

func (da *Disassembly) String() string

type ISA

type ISA struct {
	// contains filtered or unexported fields
}

ISA is an instruction set

func New

func New(mxlen, ext uint) (*ISA, error)

New creates a new RISC-V instruction set.

func (*ISA) Disassemble

func (isa *ISA) Disassemble(addr, ins uint) *Disassembly

Disassemble a RISC-V instruction at the address.

func (*ISA) GetExtensions

func (isa *ISA) GetExtensions() uint

GetExtensions returns the ISA extension bits.

func (*ISA) String

func (isa *ISA) String() string

Directories

Path Synopsis
cmd
da command

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