rfm95

const (
	// FXOSC is the radio's oscillator frequency in Hertz.
	FXOSC = 32000000

	// SPIWriteMode is used to encode register addresses for SPI writes.
	SPIWriteMode = 1 << 7
)

const (
	RegOpMode     = 0x01 // Operating mode & LoRa / FSK selection
	RegBitrateMsb = 0x02 // Bit Rate setting, Most Significant Bits
	RegBitrateLsb = 0x03 // Bit Rate setting, Least Significant Bits
	RegFdevMsb    = 0x04 // Frequency Deviation setting, Most Significant Bits
	RegFdevLsb    = 0x05 // Frequency Deviation setting, Least Significant Bits
	RegFrfMsb     = 0x06 // RF Carrier Frequency, Most Significant Bits
	RegFrfMid     = 0x07 // RF Carrier Frequency, Intermediate Bits
	RegFrfLsb     = 0x08 // RF Carrier Frequency, Least Significant Bits
)

const (
	RegPaConfig = 0x09 // PA selection and Output Power control
	RegPaRamp   = 0x0A // Control of the PA ramp time, low phase noise PLL
	RegOcp      = 0x0B // Over Current Protection control
)

const (
	RegLna            = 0x0C // LNA settings
	RegRxConfig       = 0x0D // AFC, AGC, ctrl
	RegRssiConfig     = 0x0E // RSSI
	RegRssiCollision  = 0x0F // RSSI Collision detector
	RegRssiThresh     = 0x10 // RSSI Threshold control
	RegRssiValue      = 0x11 // RSSI value in dBm
	RegRxBw           = 0x12 // Channel Filter BW Control
	RegAfcBw          = 0x13 // AFC Channel Filter BW
	RegOokPeak        = 0x14 // OOK demodulator
	RegOokFix         = 0x15 // Threshold of the OOK demodulator
	RegOokAvg         = 0x16 // Average of the OOK demodulator
	RegAfcFei         = 0x1A // AFC and FEI control
	RegAfcMsb         = 0x1B // Frequency correction value of the AFC, MSB
	RegAfcLsb         = 0x1C // Frequency correction value of the AFC, LSB
	RegFeiMsb         = 0x1D // Value of the calculated frequency error, MSB
	RegFeiLsb         = 0x1E // Value of the calculated frequency error, LSB
	RegPreambleDetect = 0x1F // Settings of the Preamble Detector
	RegRxTimeout1     = 0x20 // Timeout duration between Rx request and RSSI detection
	RegRxTimeout2     = 0x21 // Timeout duration between RSSI detection and PayloadReady
	RegRxTimeout3     = 0x22 // Timeout duration between RSSI detection and SyncAddress
	RegRxDelay        = 0x23 // Delay between Rx cycles
)

const (
	RegPreambleMsb   = 0x25 // Preamble length, MSB
	RegPreambleLsb   = 0x26 // Preamble length, LSB
	RegSyncConfig    = 0x27 // Sync Word Recognition control
	RegSyncValue1    = 0x28 // Sync Word bytes 1 through 8
	RegSyncValue2    = 0x29
	RegSyncValue3    = 0x2A
	RegSyncValue4    = 0x2B
	RegSyncValue5    = 0x2C
	RegSyncValue6    = 0x2D
	RegSyncValue7    = 0x2E
	RegSyncValue8    = 0x2F
	RegPacketConfig1 = 0x30 // Packet mode settings
	RegPacketConfig2 = 0x31 // Packet mode settings
	RegPayloadLength = 0x32 // Payload length setting
	RegNodeAdrs      = 0x33 // Node address
	RegBroadcastAdrs = 0x34 // Broadcast address
	RegFifoThresh    = 0x35 // Fifo threshold, Tx start condition
)

const (
	RegSeqConfig1 = 0x36 // Top level Sequencer settings
	RegSeqConfig2 = 0x37 // Top level Sequencer settings
	RegTimerResol = 0x38 // Timer 1 and 2 resolution control
	RegTimer1Coef = 0x39 // Timer 1 setting
	RegTimer2Coef = 0x3A // Timer 2 setting
)

const (
	RegImageCal = 0x3B // Image calibration engine control
	RegTemp     = 0x3C // Temperature Sensor value
	RegLowBat   = 0x3D // Low Battery Indicator Settings
)

const (
	RegIrqFlags1 = 0x3E // Status register: PLL Lock state, Timeout, RSSI
	RegIrqFlags2 = 0x3F // Status register: FIFO handling flags, Low Battery
)

const (
	RegDioMapping1 = 0x40 // Mapping of pins DIO0 to DIO3
	RegDioMapping2 = 0x41 // Mapping of pins DIO4 and DIO5, ClkOut frequency
)

const (
	RegPllHop      = 0x44 // Control the fast frequency hopping mode
	RegTcxo        = 0x4B // TCXO or XTAL input setting
	RegPaDac       = 0x4D // Higher power settings of the PA
	RegFormerTemp  = 0x5B // Stored temperature during the former IQ Calibration
	RegBitRateFrac = 0x5D // Fractional part in the Bit Rate division ratio
	RegAgcRef      = 0x61 // Adjustment of the AGC thresholds
	RegAgcThresh1  = 0x62
	RegAgcThresh2  = 0x63
	RegAgcThresh3  = 0x64
	RegPll         = 0x70 // Control of the PLL bandwidth
)

const (
	FskOokMode = 0 << 7
	LoRaMode   = 1 << 7

	ModulationTypeMask = 3 << 5
	ModulationTypeFSK  = 0 << 5
	ModulationTypeOOK  = 1 << 5

	ModeMask        = 7
	SleepMode       = 0
	StandbyMode     = 1
	FreqSynthModeTX = 2
	TransmitterMode = 3
	FreqSynthModeRX = 4
	ReceiverMode    = 5
)

const (
	PaBoost          = 1 << 7
	OutputPowerShift = 0
)

const (
	ModulationShapingNone   = 0 << 5
	ModulationShapingNarrow = 1 << 5
	ModulationShapingWide   = 2 << 5
	PaRamp3_4ms             = 0x0
	PaRamp2ms               = 0x1
	PaRamp1ms               = 0x2
	PaRamp500μs             = 0x3
	PaRamp250μs             = 0x4
	PaRamp125μs             = 0x5
	PaRamp100μs             = 0x6
	PaRamp62μs              = 0x7
	PaRamp50μs              = 0x8
	PaRamp40μs              = 0x9
	PaRamp31μs              = 0xA
	PaRamp25μs              = 0xB
	PaRamp20μs              = 0xC
	PaRamp15μs              = 0xD
	PaRamp12μs              = 0xE
	PaRamp10μs              = 0xF
)

const (
	LnaGainMax      = 1 << 5
	LnaGainMax_6dB  = 2 << 5
	LnaGainMax_12dB = 3 << 5
	LnaGainMax_24dB = 4 << 5
	LnaGainMax_36dB = 5 << 5
	LnaGainMax_48dB = 6 << 5
)

const (
	AfcAutoOn         = 1 << 4
	AgcAutoOn         = 1 << 3
	RxTriggerPreamble = 6 << 0
	RxTriggerRSSI     = 1 << 0
)

const (
	RxBwMantShift = 3
	RxBwMantMask  = 3 << 3
	RxBwMant16    = 0 << 3
	RxBwMant20    = 1 << 3
	RxBwMant24    = 2 << 3
	RxBwExpShift  = 0
	RxBwExpMask   = 7 << 0
)

const (
	SyncOn        = 1 << 4
	SyncSizeShift = 0
)

const (
	FixedLength           = 0 << 7
	VariableLength        = 1 << 7
	DcFreeShift           = 5
	CrcOn                 = 1 << 4
	CrcOff                = 0 << 4
	CrcAutoClearOff       = 1 << 3
	AddressFilteringShift = 1
)

const (
	PacketMode           = 1 << 6
	PayloadLengthMSBMask = 7
)

const (
	TxStartCondition   = 1 << 7
	FifoThresholdShift = 0
)

const (
	SequencerStart           = 1 << 7
	SequencerStop            = 1 << 6
	IdleModeStandby          = 0 << 5
	IdleModeSleep            = 1 << 5
	FromStartToLowPower      = 0 << 3
	FromStartToRX            = 1 << 3
	FromStartToTX            = 2 << 3
	FromStartToTXOnFifoLevel = 3 << 3
)

const (
	ModeReady        = 1 << 7
	RxReady          = 1 << 6
	TxReady          = 1 << 5
	PllLock          = 1 << 4
	Rssi             = 1 << 3
	Timeout          = 1 << 2
	PreambleDetect   = 1 << 1
	SyncAddressMatch = 1 << 0
)

const (
	FifoFull     = 1 << 7
	FifoEmpty    = 1 << 6
	FifoLevel    = 1 << 5
	FifoOverrun  = 1 << 4
	PacketSent   = 1 << 3
	PayloadReady = 1 << 2
	CrcOk        = 1 << 1
	LowBat       = 1 << 0
)

const (
	Dio0MappingShift = 6
	Dio1MappingShift = 4
	Dio2MappingShift = 2
	Dio3MappingShift = 0
)

const (
	Dio4MappingShift  = 6
	Dio5MappingShift  = 4
	MapPreambleDetect = 1 << 0
	MapRssi           = 0 << 0
)

const (
	PaDacDefault   = 0x04
	PaDacPlus20dBm = 0x07
)

const ConfigurationStart = RegOpMode

const (
	RegFifo = 0x00 // FIFO read/write access
)

const (
	RegOsc = 0x24 // RC Oscillators Settings, CLK-OUT frequency
)

const (
	RegVersion = 0x42 // Hope RF ID relating the silicon revision
)